On the Tradeoff between Productivity and Area Optimization in VLSI Design

1 Abstract— In this paper, we examine, through direct experimentation, the tradeoff between design quality and performance, in terms of optimized design area, and the design time required to achieve this desired level of optimization. It is accepted that the costs associated with executing a VLSI design project must be managed. This includes finding an appropriate (and profitable) balance between area optimizations (affecting production costs) and design time (affecting NRE costs). We explore this tradeoff through direct experimentation as a precursor to identifying an appropriate set of design utility/cost functions to allow this design decision-making to be automated.